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Espressif Systems /ESP32-P4 /SPI0 /SPI_MEM_DIN_NUM

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Interpret as SPI_MEM_DIN_NUM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPI_MEM_DIN0_NUM 0SPI_MEM_DIN1_NUM 0SPI_MEM_DIN2_NUM 0SPI_MEM_DIN3_NUM 0SPI_MEM_DIN4_NUM 0SPI_MEM_DIN5_NUM 0SPI_MEM_DIN6_NUM 0SPI_MEM_DIN7_NUM 0SPI_MEM_DINS_NUM

Description

MSPI flash input timing delay number control register

Fields

SPI_MEM_DIN0_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN1_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN2_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN3_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN4_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN5_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN6_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DIN7_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…
SPI_MEM_DINS_NUM

the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,…

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data